Difference between revisions of "IBM Compiler Workshop"
| Line 5: | Line 5: | ||
9:00-9:15 Introduction and overview of agenda | 9:00-9:15 Introduction and overview of agenda | ||
| − | 9:15-11:15 [Compiler Overview] - machine independent (Roch) | + | 9:15-11:15 [http://support.scinet.utoronto.ca/Tutorials/compiler-workshop/CompilerTutorial.pdf Compiler Overview] - machine independent (Roch) |
Compiler overview (block diagrams, high level optimizations) and roadmap | Compiler overview (block diagrams, high level optimizations) and roadmap | ||
Compiler Details and flag enhancements | Compiler Details and flag enhancements | ||
| Line 14: | Line 14: | ||
11:15-11:30 break | 11:15-11:30 break | ||
| − | 11:30-12:30 POWER6 overview - hardware (Jim) | + | 11:30-12:30 [http://support.scinet.utoronto.ca/Tutorials/compiler-workshop/POWER6_Hardware_Overview.pdf POWER6 overview - hardware] (Jim) |
P6 processor (Caches, functional units, MC, fabric) | P6 processor (Caches, functional units, MC, fabric) | ||
SMT, prefetch, … | SMT, prefetch, … | ||
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12:30-2:15 Lunch | 12:30-2:15 Lunch | ||
| − | 2:15-3:30 Compiling for POWER6 (Damien) | + | 2:15-3:30 [http://support.scinet.utoronto.ca/Tutorials/compiler-workshop/Compiling_for_POWER6.pdf Compiling for POWER6] (Damien) |
Compiler flags specific to power6 | Compiler flags specific to power6 | ||
SIMD unit (vmx) tuning | SIMD unit (vmx) tuning | ||
Revision as of 15:59, 29 April 2009
This workshop was led by Roch Archambault, from the IBM Toronto Lab, and focused on their compiler technologies, specifically for the POWER architecture. The agenda for the 2-day workshop was:
Tuesday 17 February 2009
9:00-9:15 Introduction and overview of agenda
9:15-11:15 Compiler Overview - machine independent (Roch) Compiler overview (block diagrams, high level optimizations) and roadmap Compiler Details and flag enhancements O4, O5, qhot, qipa, inlining, stackcheck, pdf why qhot default in v10/11? useful information in listings
11:15-11:30 break
11:30-12:30 POWER6 overview - hardware (Jim) P6 processor (Caches, functional units, MC, fabric) SMT, prefetch, … Systems (HE, IH, L4, HV4, HV8) – focus on IH Including which exploit 2 MC, 2B vs. 4B vs. 8B fabric Clock speeds Hand Tuning Recommendations Separation of FP Compare and Branch FP Store double pair
12:30-2:15 Lunch
2:15-3:30 Compiling for POWER6 (Damien) Compiler flags specific to power6 SIMD unit (vmx) tuning Transformation report
3:30-3:45 break
3:45-5:00 FORTRAN 2003 Standard (Jim Xia)
5:00-5:30 Questions, wrap up discussion (all)
Wednesday 18 February 2009
9:30-10:30: Compiler Tutorial - Part 1 Compiler tuning and debugging tips
10:30-10:45 break
10:45-12:30: Compiler Tutorial - Part 2 Compiler tuning and debugging tips
12:30-1:30 Lunch
1:30-2:30 Compiler Tutorial - Part 3 Compiler tuning and debugging tips
2:30-3:00 Finer grain –qstrict for HPC codes (Ian)
3:00-3:15 break
3:15-3:45 Open MP 3.0 (Kelvin Li)
3:45-4:15 Co-Array Fortran (Jim)
4:15-4:45 UPC (Kit)
4:45-5:00 Questions, wrap up discussion